HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 19

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

13.4 Operation in Asynchronous Mode ....................................................................................426
13.5 Multiprocessor Communication Function.........................................................................437
13.6 Operation in Clocked Synchronous Mode ........................................................................443
13.7 Smart Card Interface .........................................................................................................451
13.8 Interrupt Sources ...............................................................................................................460
13.9 Usage Notes ......................................................................................................................463
13.4.1 Data Transfer Format ...........................................................................................427
13.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous
13.4.3 Clock....................................................................................................................429
13.4.4 SCI Initialization (Asynchronous Mode) .............................................................430
13.4.5 Data Transmission (Asynchronous Mode)...........................................................431
13.4.6 Serial Data Reception (Asynchronous Mode)......................................................433
13.5.1 Multiprocessor Serial Data Transmission ............................................................439
13.5.2 Multiprocessor Serial Data Reception .................................................................440
13.6.1 Clock....................................................................................................................443
13.6.2 SCI Initialization (Clocked Synchronous Mode) .................................................444
13.6.3 Serial Data Transmission (Clocked Synchronous Mode) ....................................445
13.6.4 Serial Data Reception (Clocked Synchronous Mode)..........................................447
13.6.5 Simultaneous Serial Data Transmission and Reception
13.7.1 Pin Connection Example......................................................................................451
13.7.2 Data Format (Except for Block Transfer Mode) ..................................................452
13.7.3 Block Transfer Mode ...........................................................................................453
13.7.4 Receive Data Sampling Timing and Reception Margin.......................................454
13.7.5 Initialization .........................................................................................................455
13.7.6 Serial Data Transmission (Except for Block Transfer Mode)..............................456
13.7.7 Clock Output Control...........................................................................................459
13.8.1 Interrupts in Normal Serial Communication Interface Mode...............................460
13.8.2 Interrupts in Smart Card Interface Mode .............................................................462
13.9.1 TDR Write and TDRE Flag .................................................................................463
13.9.2 Module Standby Mode Setting.............................................................................463
13.9.3 Break Detection and Processing (Asynchronous Mode Only).............................463
13.9.4 Sending Break Signal (Asynchronous Mode Only) .............................................463
13.9.5 Receive Error Flags and Transmit Operations
13.9.6 Notes on DMAC and DTC Use ...........................................................................464
13.9.7 Notes on Clocked Synchronous External Clock Mode ........................................464
13.9.8 Note on Clocked Synchronous Internal Clock Mode...........................................465
Mode ....................................................................................................................428
(Clocked Synchronous Mode) .............................................................................449
(Clocked Synchronous Mode Only).....................................................................464
Rev.4.00 Mar. 27, 2008, Page xvii of xliv
REJ09B0108-0400