HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 700

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

18. I/O Ports
18.6
Port F is an input-only port with the eight pins shown in figure 18.9.
18.6.1
Port F is an 8-bit input-only port. Port F has the following register. For details on register
addresses and register states during each processing, refer to section 25, List of Registers.
• Port F data register (PFDR)
18.6.2
The port F data register (PFDR) is an 8-bit read-only register that stores port F data.
Bits PF7DR to PF0DR correspond to pins PF7 to PF0 (multiplexed functions omitted here).
Any value written into these bits is ignored, and there is no effect on the state of the pins. When
any of the bits are read, the pin state rather than the bit value is read directly. However, when an
A/D converter analog input is being sampled, values of 1 are read out. Table 18.6 summarizes port
F data register read/write operations.
Rev.4.00 Mar. 27, 2008 Page 654 of 882
REJ09B0108-0400
Port F
Register Descriptions
Port F Data Register (PFDR)
Port F
Figure 18.9 Port F
PF7 (input) / AN7 (input)
PF6 (input) / AN6 (input)
PF5 (input) / AN5 (input)
PF4 (input) / AN4 (input)
PF3 (input) / AN3 (input)
PF2 (input) / AN2 (input)
PF1 (input) / AN1 (input)
PF0 (input) / AN0 (input)