HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 293

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
3
2
Bit Name
TGFD
TGFC
0
0
Initial Value R/W
R/(W)* Input Capture/Output Compare Flag D
R/(W)* Input Capture/Output Compare Flag C
Description
Status flag that indicates the occurrence of TGRD input
capture or compare match in channels 0, 3, and 4. Only
0 can be written, for flag clearing. In channels 1 and 2,
bit 3 is reserved. It is always read as 0 and the write
value should always be 0.
[Setting conditions]
•
•
[Clearing conditions]
•
•
Status flag that indicates the occurrence of TGRC input
capture or compare match in channels 0, 3, and 4. Only
0 can be written, for flag clearing. In channels 1 and 2,
bit 2 is reserved. It is always read as 0 and the write
value should always be 0.
[Setting conditions]
•
•
[Clearing conditions]
•
•
When TCNT = TGRD and TGRD is functioning as
output compare register
When TCNT value is transferred to TGRD by input
capture signal and TGRD is functioning as input
capture register
When DTC is activated by TGID interrupt and the
DISEL bit of DTMR in DTC is 0
When 0 is written to TGFD after reading TGFD = 1
When TCNT = TGRC and TGRC is functioning as
output compare register
When TCNT value is transferred to TGRC by input
capture signal and TGRC is functioning as input
capture register
When DTC is activated by TGIC interrupt and the
DISEL bit of DTMR in DTC is 0
When 0 is written to TGFC after reading TGFC = 1
11.
Rev.4.00 Mar. 27, 2008 Page 247 of 882
Multi-Function Timer Pulse Unit (MTU)
REJ09B0108-0400