HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 580

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 17 Serial Communication Interface (SCI)
again receive data with the multiprocessor bit set to 1. Multiple processors can send and receive
data in this way.
Figure 17.12 shows an example of communication among processors using the multiprocessor
format.
Transmitting
station
Serial communications circuit
Receiving
Receiving
Receiving
Receiving
station A
station B
station C
station D
(ID = 01)
(ID = 02)
(ID = 03)
(ID = 04)
Serial
H'01
H'AA
data
(MPB = 1)
(MPB = 0)
ID transmit cycle =
Data transmit cycle =
specifies receiving station
data transmission to
receiving station specified
by ID
MPB: Multiprocessor bit
Figure 17.12 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)
Communication Formats
Four formats are available. Parity-bit settings are ignored when the multiprocessor format is
selected. For details see table 17.11.
Clock
See the description in the asynchronous mode section.
Rev.6.00 Mar. 27, 2009 Page 522 of 1036
REJ09B0254-0600