HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 775

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

23.7
23.7.1
A command transmitted from the host by control transfer may require decoding and execution of
command processing on the application side. Whether command decoding is required on the
application side is indicated in table 23.3 below.
Table 23.3 Command Decoding on Application Side
Decoding not Necessary on Application Side
Clear feature
Get configuration
Get interface
Get status
Set address
Set configuration
Set feature
Set interface
If decoding is not necessary on the application side, command decoding and data stage and status
stage processing are performed automatically. No processing is necessary by the user. An
interrupt is not generated in this case.
If decoding is necessary on the application side, the USB function module stores the command in
the EP0s FIFO. After normal reception is completed, the USBIER0/SETUP TS flag is set and an
interrupt request is generated. In the interrupt routine, 8 bytes of data must be read from the EP0s
data register (USBEPDR0S) and decoded by firmware. The necessary data stage and status stage
processing should then be carried out according to the result of the decoding operation.
Processing of USB Standard Commands and Class/Vendor
Commands
Processing of Commands Transmitted by Control Transfer
Get descriptor
Sync frame
Set descriptor
Class/Vendor command
Decoding Necessary on Application Side
Rev.6.00 Mar. 27, 2009 Page 717 of 1036
Section 23 USB Function Controller
REJ09B0254-0600