HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 733

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

21.3.3
Figure 21.7 shows the blocks diagram of DAA circuit. Ringing detect and dial pulse sending
sequence are described below.
(1) Ringing Detect Sequence
After the first ringing interrupt occurs, counting starts with writing 1 into RCEN bit of CTR2.
AFE must be operating before counting, because periodic counter counts AFE_FS from falling
edge to next falling edge.
The value of RCNTV register is effective only after 2nd interrupt generation, because the value of
RCNTV register is transferred from counter with a trigger of ending of 1st period cycle.
RCNTV will be 258H (600 in decimal) if ringing cycle is 16Hz and counted by 9600Hz which is
default value of AFE_FS. Figure 21.8 shows detecting sequence of ringing.
AFEIF
DAA Interface
AFE_RLYCNT
AFE_RDET
(STLC7550)
AFE
Hyblid circuit
Figure 21.7 DAA Block Diagram
Section 21 Analog Front End Interface (AFEIF)
Rev.6.00 Mar. 27, 2009 Page 675 of 1036
DC holding
Ringing detector
circuit
REJ09B0254-0600
Hook relay
Ring
Tip