HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 690

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Section 20 Serial IO (SIOF)
(2) Transmit or Receive Timing
Timing to SCK_SIO for transmitting TXD_SIO or receiving RXD_SIO can be chosen from the
following two cases. Timing for transmitting or receiving is set into REDG bit in SIMDR register.
In slave mode 1 or slave mode 2, only the sample at falling is valid.
• Sample at falling
• Sample at rising
Figure 20.4 shows the timing for transmitting or receiving.
20.3.3
SIOF transmit two kind of data shown below.
• Transmit or receive data: Transmit data of 8 bit/16 bit/16 bit stereo
• Control data: 16 bit length (interface by using the dedicated register)
(1) Transmit Mode
SIOF has four modes as transmit mode shown in table 20.4. Transmit mode is set to bits TRMD1
to TRMD0 in SIMDR register.
Table 20.4 Serial Transmit Mode
Transmit Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
Rev.6.00 Mar. 27, 2009 Page 632 of 1036
REJ09B0254-0600
(a) Falling sampling
SCK_SIO
SIOFSYNC
TXD_SIO
RXD_SIO
Transmit Data Format
Figure 20.4 SIOF Transmit or Receive Timing
Sync pulse
SIOFSYNC
Sync pulse
Sync pulse
L/R
Receive timing
Transmit timing
Bit Delay
1 bit
1 bit
1 bit
Nothing
(b) Rising sampling
SCK_SIO
SIOFSYNC
TXD_SIO
RXD_SIO
Secondary FS
Control Data
Slot position
Slot Position
No support
Receive timing
Transmit timing