HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 831

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

25.2.4
LDSMR selects whether or not to enable the hardware rotation function that is used to rotate the
LCD panel, and sets the burst length for the system memory (VRAM) obtained for display.
Bits 15, 14, 12 to 10, and 7 to 0—Reserved
Bit 13—Rotation Module Select (ROT): Selects whether or not to rotate the display by
hardware. Note that the following restrictions are applied to rotation.
• An STN or TFT panel must be used. A DSTN panel is not allowed.
• The maximum horizontal (internal scan direction of the LCD panel) width of the LCD panel is
• Set a binary exponential that exceeds the display size in LDLAOR. (For example, select 256
Bit 13
ROT
0
1
Bits 9 and 8—Access Unit Select (AU1 and AU0): Select the unit for accessing VRAM. This bit
is valid only when the ROT bit is set to 1 (rotation is performed). When the ROT bit is cleared to
0, 16-burst operation is performed regardless of the AU bits.
Bit 9
AU1
0
1
Initial value:
320.
when a 320
the image is 240 bytes.)
R/W:
Bit:
LCDC Scan Mode Register (LDSMR)
15
—
R
0
Description
LCD module)
Bit 8
AU0
1
1
Not rotated
Rotated 90 degrees rightwards (left side of image is displayed on the upper side of the
0
0
×
14
—
R
0
240 panel is rotated to be used as a 240
ROT
R/W
13
0
Description
8-burst operation
16-burst operation
32-burst operation
4-burst operation
12
—
R
0
11
—
R
0
10
—
R
0
AU1
R/W
9
0
AU0
R/W
8
0
Rev.6.00 Mar. 27, 2009 Page 773 of 1036
—
R
7
0
×
320 panel and the horizontal width of
—
R
6
0
—
R
5
0
Section 25 LCD Controller
—
R
4
0
—
R
3
0
REJ09B0254-0600
—
R
2
0
(Initial value)
(Initial value)
—
R
1
0
—
R
0
0