NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 284

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.7.2
5.7.2.1
5.7.2.2
The maximum captured frequency that PWM can capture is confined by the capture interrupt
latency. When capture interrupt occurred, software will do at least three steps, they are: Read
PIIRx to get interrupt source and Read PWM_CRLx/PWM_CFLx(x=0~3) to get capture value and
finally write 1 to clear PIIRx to zero. If interrupt latency will take time T0 to finish, the capture
signal mustn’t transition during this interval (T0). In this case, the maximum capture frequency will
be 1/T0. For example:
HCLK = 50MHz, PWM_CLK = 25MHz, Interrupt latency is 900 ns
So the maximum capture frequency will is 1/900ns ≈ 1000 kHz
Features
PWM function features:
Capture Function Features:
NuMicro™ NUC100 Series Technical Reference Manual
PWM group has two PWM generators. Each PWM generator supports one 8-bit
prescaler, one clock divider, two PWM-timers (down counter), one dead-zone
generator and two PWM outputs.
Up to 16 bits resolution
PWM Interrupt request synchronized with PWM period
One-shot or Auto-reload mode PWM
Up to 2 PWM group (PWMA/PWMB) to support 8 PWM channels or 4 PWM paired
channels (only 1 PWM group support for Low Density)
Timing control logic shared with PWM Generators
Support 8 Capture input channels shared with 8 PWM output channels (Low Density
only support 4 Capture input channels shared with 4 PWM output channels)
Each channel supports one rising latch register (CRLR), one falling latch register
(CFLR) and Capture interrupt flag (CAPIFx)
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Publication Release Date: Dec. 22, 2010
Revision V1.06