NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 536

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PDMA Service Selection Control Register 1 (PDSSR1)
Register
PDSSR1
Bits
[31:28]
[27:24]
[23:16]
[15:12]
[11:8]
[7:4]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
Reserved
ADC_RXSEL
Reserved
UART1_TXSEL
UART1_RXSEL
UART0_TXSEL
Address
PDMA_BA_GCR+0x08 R/W
30
22
14
6
UART1_TXSEL
UART0_TXSEL
Reserved
Reserved
PDMA ADC RX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral ADC
RX. Software can configure the RX channel setting by ADC_RXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
Reserved
PDMA UART1 TX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART1
TX. Software can configure the TX channel setting by UART1_TXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
PDMA UART1 RX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART1
RX. Software can configure the RX channel setting by UART1_RXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
PDMA UART0 TX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART0
TX. Software can configure the TX channel setting by UART0_TXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
29
21
13
5
R/W
Description
PDMA Service Selection Control Register 1
28
20
12
4
- 536 -
Reserved
27
19
11
3
Publication Release Date: Dec. 22, 2010
26
18
10
2
UART1_RXSEL
UART0_RXSEL
ADC_RXSEL
25
17
9
1
Revision V1.06
Reset Value
0xFFFF_FFFF
24
16
8
0