NUC100LC1BN Nuvoton Technology Corporation of America, NUC100LC1BN Datasheet - Page 359

• Manufacturer Part Number: NUC100LC1BN
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™r

Specifications of NUC100LC1BN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

SPI Divider Register (SPI_DIVIDER)
Register
SPI_DIVIDER SPIx_BA+0x04
Bits
[31:16]
[15:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
Descriptions
DIVIDER2
DIVIDER
30
22
14
6
R/W
R/W
Clock Divider 2 Register (master only)
The value in this field is the 2
generate the serial clock on the output SPICLK. The desired frequency is obtained
according to the following equation:
Clock Divider Register (master only)
The value in this field is the frequency divider of the system clock, PCLK, to generate
the serial clock on the output SPICLK. The desired frequency is obtained according to
the following equation:
In slave mode, the period of SPI clock driven by a master shall equal or over 5 times
the period of PCLK. In other words, the maximum frequency of SPI clock is the fifth of
the frequency of slave’s PCLK.
f
f
29
21
13
5
sclk
sclk
=
=
Description
Clock Divider Register (Master Only)
(
(
DIVIDER
DIVIDER
28
20
12
f
f
4
DIVIDER2[15:8]
DIVIDER2[7:0]
DIVIDER[15:8]
DIVIDER[7:0]
- 359 -
pclk
pclk
2
+
+
1
1
* )
* )
2
2
27
19
11
3
nd
frequency divider of the system clock, PCLK, to
Publication Release Date: Oct 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
24
16
8
0