s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 109

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
FORMAT 1: MOVE SHIFTED REGISTER
OPERATION
These instructions move a shifted value between Lo registers. The THUMB assembler syntax is shown in
Table 3-8.
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 3-8. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
Examples
OP
00
01
10
LSL Rd, Rs, #Offset5
LSR Rd, Rs, #Offset5
ASR Rd, Rs, #Offset5
THUMB Assembler
15
0
LSR
14
0
13
0
R2, R5, #27
All instructions in this group set the CPSR condition codes.
12
Table 3-8. Summary of Format 1 Instructions
Op
MOVS Rd, Rs, LSL #Offset5
MOVS Rd, Rs, LSR #Offset5
MOVS Rd, Rs, ASR #Offset5
11
ARM Equivalent
[2:0] Destination Register
[5:3] Source Register
[10:6] Immediate Vale
[12:11] Opcode
0 = LSL
1 = LSR
2 = ASR
Figure 3-30. Format 1
10
Offset5
NOTE
; Logical shift right the contents
; of R5 by 27 and store the result in R2.
; Set condition codes on the result.
6
Shift Rs left by a 5-bit immediate value and
store the result in Rd.
Perform logical shift right on Rs by a 5-bit
immediate value and store the result in Rd.
Perform arithmetic shift right on Rs by a 5-bit
immediate value and store the result in Rd.
5
Rs
3
Action
2
Rd
INSTRUCTION SET
0
3-67