s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 118

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

INSTRUCTION SET
FORMAT 6: PC-RELATIVE LOAD
OPERATION
This instruction loads a word from an address specified as a 10-bit immediate offset from the PC. The THUMB
assembler syntax is shown below.
NOTE: The value specified by #Imm is a full 10-bit address, but must always be word-aligned (ie with bits 1:0 set to 0),
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction. The instruction cycle times for the THUMB
instruction are identical to that of the equivalent ARM instruction.
Examples
3-76
LDR Rd, [PC, #Imm]
THUMB Assembler
since the assembler places #Imm >> 2 in field Word 8. The value of the PC will be 4 bytes greater than
the address of this instruction, but bit 1 of the PC is forced to 0 to ensure it is word aligned.
15
0
LDR R3,[PC,#844]
14
0
13
0
Table 3-13. Summary of PC-Relative Load Instruction
12
0
LDR Rd, [R15, #Imm]
11
0
ARM Equivalent
10
[7:0] Immediate Value
[10:8] Destination Register
Figure 3-35. Format 6
Rd
8
; Load into R3 the word found at the
; address formed by adding 844 to PC.
; bit[1] of PC is forced to zero.
; Note that the THUMB opcode will contain
; 211 as the Word8 value.
7
Add unsigned offset (255 words, 1020 bytes)
in Imm to the current value of the PC. Load
the word from the resulting address into Rd.
Word 8
Action
0
S3C4510B