s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 153
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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S3C4510B
Table 4-7 and 4-8
Using big-endian and byte access, Program/Data path between register and external memory
BA=Address whose LSB is 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
BAL=Address whose LSB is 0,2,4,6,8,A,C,E
BAU=Address whose LBS is 1,3,5,7,9,B,D,F
BA0=Address whose LSB is 0,4,8,C
BA1=Address whose LBS is 1,5,9,D
BA2=Address whose LSB is 2,6,A,E
BA3=Address whose LBS is 3,7,B,F
X=Don't care
CAS3-0/nWBE3-0=0 means active and 1 means inactive
Bit Num.
CPU Register Data
CPU Address
Bit Num.
CPU Data Bus
Bit Num.
Internal SD Bus
External Address
CAS3-0/nWBE3-0
Bit Num.
XDATA
Bit Num.
Ext. Memory Data
Timing Sequence
Ext. Memory Type
Table 4-7. Byte Access Store Operation with Big-Endian
dXXX
31 24
dddd
dddd
0111
BA0
31 0
31 0
BA0
31 0
d
XdXX
23 16
dddd
dddd
1011
BA1
31 0
31 0
BA0
31 0
d
STORE (CPU Reg
Word
abcd
31 0
XXdX
dddd
dddd
1101
31 0
31 0
31 0
15 8
BA2
BA0
d
XXXd
dddd
dddd
1110
31 0
31 0
31 0
BA3
BA0
7 0
d
External Memory)
XX10
dddd
dddd
BAL
31 0
31 0
BAL
15 0
15 0
dX
d
Half Word
abcd
31 0
XX01
dddd
dddd
BAU
31 0
31 0
BAL
15 0
15 0
SYSTEM MANAGER
Xd
d
XXX0
dddd
dddd
Byte
abcd
31 0
31 0
31 0
7 0
7 0
BA
BA
d
d
4-11
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