s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 267
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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S3C4510B
MAC Received Pause Count Register
The received pause count register, EPZCNT, stores the current value of the 16-bit received pause counter.
MAC Remote Pause Count Register
The remote Pause count register, ERMPZCNT, stores the current value of the 16-bit remote Puase counter.
EPZCNT
ERMPZCNT
Bit Number
Bit Number
Registers
Registers
[15:0]
[15:0]
Received pause count
(EPZCNT)
Received pause count
(EPZCNT)
0XA040
0XA044
Offset
Offset
Table 7-39. Received Pause Count Register Description
Bit Name
Bit Name
Table 7-41. Remote Pause Count Register Description
Table 7-40. ERMPZCNT Register
Table 7-38. EPZCNT Register
R/W
R/W
R
R
The count value indicates the number of time slots the
transmitter was paused due to the receipt of control pause
operation packets from the MAC.
The count value indicates the number of time slots that a
remote MAC was paused as a result of its sending control
pause operation packets.
Pause count
Remote pause count
Description
Description
Description
Description
ETHERNET CONTROLLER
Reset Value
Reset Value
0x00000000
0x00000000
7-45
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