s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 350

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

DMA CONTROLLER
SINGLE AND FOUR DATA BURST MODE (GDMACON[11] = 0, [9] = 1 )
DREQ & DACK signals are active low.
In the four data burst mode, GDMA COUNT Register(GDMA CNT) value decreases by 1 after 4 data transfer.
9-14
In_MCLK
Address
GDMA
DREQ
DACK
NOTE:
Data
CNT
Address order is source address0 -> source address1 -> source address 2 -> source address3
address3, and Data order is source data0 -> source data1 -> source data2 -> source data3
-> destination data0 -> destination data1 -> destination data2 -> destination data3.
-> destination address0 -> destination address1 -> destination address2 -> destination
Figure 9-12. Single and Four Data Burst Mode Timing
S0
S1
S2
N
Recommand
Deasserted Time
S3
D0
D1
D2
D3
N-1
S4
S3C4510B