s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 16

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

PRODUCT OVERVIEW
NOTE: pticu and pticd provides 100K Ohm Pull-up(down) register. For detail information about the pad type, see Chapter 4.
1-16
ptic
ptis
pticu
pticd
pia_bb
pob1
ptot2
pob4
ptot4
ptot6
ptbsut1
ptbcut4
ptbcd4
ptbst4sm
Ptbsut6
Pad Type
Input/Output Cells of the "STD90/MDL90 0.35 um 3.3 V Standard Cell Library Data Book", produced by Samsung
Electrionic Co., Ltd, ASIC Team.
nRSCO
NOTE: After the falling edge of nRESET, the S3C4510B count 64 cycles for a system reset
nRESET
I/O Type
and needs further 512 cycles for a TAG RAM clear of cache.
After these cycles, the S3C4510B asserts nRCS0 when the nRESET is released.
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
Current
Drive
1 mA
4 mA
4 mA
6 mA
1 mA
4 mA
4 mA
4 mA
6 mA
2 mA
–
–
–
–
–
64*f
LVCMOS level
LVCMOS schmit trigger level
LVCMOS level
LVCMOS level
Analog input with seperate bulk bias
Normal buffer
Tri-state buffer
Normal buffer
Tri-state buffer
Tri-state buffer
LVCMOS schmit trigger level
Tri-state buffer
LVCMOS level Tri-state buffer
LVCMOS level open drain buffer
LVCMOS schmit trigger level
LVCMOS schmit trigger level
Figure 1-3. Reset Timing Diagram
Table 1-3. S3C4510B PAD Type
MCLK
Cell Type
512*f
MCLK
Pull-down register
Pull-up register
Pull-up register
Pull-up register
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
5 V-tolerant
Feature
–
–
–
Slew-Rate
Control
Medium
Medium
S3C4510B
–
–
–
–
–
–
–
–
–
–
–
–
–