s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 240

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

ETHERNET CONTROLLER
7-18
31
O
30
[0] No-padding mode (P)
0 = Padding mode
[1] No-CRC mode (C)
0 = CRC mode
[2] MAC transmit interrupt enable after transmission of this frame (T)
0 = Disable
[3] Little-Endian mode (L)
0 = Big-endian
[4] Frame data pointer increment/decrement (A)
0 = Decrement
[6:5] Widget alignment control (WA)
(Non-aligned data must be transmitted without alignment control.)
00 = No invalid bytes
10 = Two invalid bytes
[31] Ownership bit (0)
0 = CPU
[30:0] Frame data pointer
The address of the frame data to be transmitted.
[15:0] Frame length
The size of the transmit frame.
[31:16] Tx status
This Tx frame status field is updated by the MAC after transmission.
[31:0] Next frame descriptor pointer
The address of the next frame descriptor.
Tx Status
Figure 7-7. Data Structure of Tx Frame Descriptor
1 = No-padding mode
1 = No-CRC mode
1 = Enable
1 = Little-endian
1 = Increment
Reserved
Next Frame Descriptor Pointer
01 = One invalid byte
11 = Three invalid bytes
Frame Data Pointer
1 = BDMA
16
15
Frame Length
7 6
WA
5 4 3 2 1
A
L
T
C
P
0
S3C4510B