s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 252
s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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ETHERNET CONTROLLER
BDMA Receive Frame Maximum Size Register
BDMA Status Register
7-30
BDMARXLSZ
BDMASTAT
Bit Number
Registers
Registers
[31:16]
[15:0]
BDMA receive frame
maximum size (BRxLSZ)
BDMA receive frame length
(BRxFSZ), read-only
Table 7-12. BDMA Receive Frame Maximum Size Register Description
0x9010
0x9014
Offset
Offset
Bit Name
Table 7-11. BDMARXLSZ Register
Table 7-13. BDMASTAT Register
R/W
R/W
R/W
R/W
This register value controls how many bytes per frame can be
saved to memory. If the received frame size exceeds the
value stored in this location, an error condition is reported.
When an early notification (early notify) interrupt occurs, the
frame Length/Ethernet type field contains the Frame size of
the frame that is currently being received.
To save space in the frame memory buffer, you can determine
the current frame length by 1) enabling the early notification
interrupt, and 2) reading the BRxFSZ field when the interrupt
occurs.
To calculate the value of the next frame start address pointer,
you add the current frame size value (BRxFSZ) to the BDMA
receive start address register. (For a control packet, additional
space may be needed.)
NOTE: To obtain the next Rx frame address that is to be
saved in the Rx frame start address register, we recommend
that you first halt the BDMA operation.
Buffered DMA status
Receive frame maximum size
Description
Description
Description
Reset Value
Reset Value
0x00000000
Undefined
S3C4510B
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