s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 337
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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S3C4510B
9
OVERVIEW
The S3C4510B has a two-channel general DMA controller, called the GDMA. The two-channel GDMA performs
the following data transfers without CPU intervention:
— Memory-to-memory (memory to/from memory)
— UART-to-memory (serial port to/from memory)
The on-chip GDMA can be started by software and/or by an external DMA request (nXDREQ). Software can also
be used to restart a GDMA operation after it has been stopped.
The CPU can recognize when a GDMA operation has been completed by software polling and/or when it receives
an appropriate internally generated GDMA interrupt. The S3C4510B GDMA controller can increment or
decrement source or destination addresses and conduct 8-bit (byte), 16-bit (half-word), or 32-bit (word) data
transfers.
nXDREQ 0
nXDREQ 1
DMA CONTROLLER
UART0
UART1
Mode Selection
Figure 9-1. GDMA Controller Block Diagram
Mode Selection
GDMA Channel 0
nDREQ
nDREQ
GDMA Channel 1
System BUS
Port 14 Data
GDMA
GDMA
nDACK
nDACK
Port 15 Data
IOPCON [29:28]
IOPCON [27:26]
nXDACK 0
nXDACK 1
DMA CONTROLLER
9-1
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