s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 226

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

ETHERNET CONTROLLER
MAC FUNCTION BLOCKS
The major function blocks of the ethernet controller s MAC layer are described in Table 7-1 and Figure 7-1.
7-4
Media Independent
Interface (MII)
Transmit block
Receive block
Flow control block
MAC control (command)
and status registers
Loop-back circuit
Function Block
The interface between the physical layer and the transmit and receive blocks.
Moves the outgoing data from the transmit buffer to the MII. The transmit block
includes circuits for generating the CRC, checking parity, and generating
preamble or jam. The transmit block also has timers for back-off after collision
and for the interframe gap the follows a transmission.
Accepts incoming data from the MII and stores it in the receive FIFO. The
receive block has logic for computing and checking the CRC value, generating
parity for data from the MII, and checking minimum and maximum packet
lengths. The receive block also has a content addressable memory (CAM) block
which provides for address lookup, and for acceptance or rejection for packets
based on their destination address.
Recognizes MAC control packets and supports the pause operation for full-duplex
links. The flow control block also supports generation of pause packets, and
provides timers and counters for pause control.
Controls programmable options, including the enabling or disabling of signals
which notify the system when conditions occur. The status registers hold
information for error handling software, and the error counters accumulate
statistical information for network management software.
Provides for MAC-layer testing in isolation from the MII and physical layer.
Table 7-1. MAC Function Block Descriptions
Description
S3C4510B