s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 110

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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INSTRUCTION SET
FORMAT 2: ADD/SUBTRACT
OPERATION
These instructions allow the contents of a Lo register or a 3-bit immediate value to be added to or subtracted
from a Lo register. The THUMB assembler syntax is shown in Table 3-9.
3-68
OP
0
0
1
1
0
1
0
1
I
15
0
ADD Rd, Rs, Rn
ADD Rd, Rs, #Offset3 ADDS Rd, Rs, #Offset3
SUB Rd, Rs, Rn
SUB Rd, Rs, #Offset3 SUBS Rd, Rs, #Offset3
THUMB Assembler
14
0
13
0
All instructions in this group set the CPSR condition codes.
12
1
Table 3-9. Summary of Format 2 Instructions
11
[2:0] Destination Register
[5:3] Source Register
[8:6] Register/Immediate Value
[9] Opcode
0 = ADD
1 = SUB
[10] Immediate Flag
0 = Register operand
1 = Immediate oerand
1
ADDS Rd, Rs, Rn
SUBS Rd, Rs, Rn
10
1
ARM Equivalent
Figure 3-31. Format 2
Op
9
8
NOTE
Rn/Offset3
6
Add contents of Rn to contents of Rs.
Place result in Rd.
Add 3-bit immediate value to contents of Rs.
Place result in Rd.
Subtract contents of Rn from contents of Rs.
Place result in Rd.
Subtract 3-bit immediate value from contents
of Rs. Place result in Rd.
5
Rs
3
Action
2
Rd
0
S3C4510B

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