s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 119

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C4510B
FORMAT 7: LOAD/STORE WITH REGISTER OFFSET
OPERATION
These instructions transfer byte or word values between registers and memory. Memory addresses are pre-
indexed using an offset register in the range 0-7. The THUMB assembler syntax is shown in Table 3-14.
L
0
0
1
1
B
0
1
0
1
15
0
STR Rd, [Rb, Ro]
STRB Rd, [Rb, Ro]
LDR Rd, [Rb, Ro]
LDRB Rd, [Rb, Ro]
THUMB Assembler
14
1
13
0
12
1
Table 3-14. Summary of Format 7 Instructions
11
L
STR Rd, [Rb, Ro]
STRB Rd, [Rb, Ro]
LDR Rd, [Rb, Ro]
LDRB Rd, [Rb, Ro]
ARM Equivalent
10
B
[2:0] Source/Destination Register
[5:3] Base Register
[8:6] Offset Register
[10] Byte/Word Flag
0 = Transfer word quantity
1 = Transfer byte quantity
[11] Load/Store Flag
0 = Store to memory
1 = Load from memory
Figure 3-36. Format 7
9
0
8
Pre-indexed word store:
Calculate the target address by adding together the
value in Rb and the value in Ro. Store the contents of
Rd at the address.
Pre-indexed byte store:
Calculate the target address by adding together the
value in Rb and the value in Ro. Store the byte value
in Rd at the resulting address.
Pre-indexed word load:
Calculate the source address by adding together the
value in Rb and the value in Ro. Load the contents of
the address into Rd.
Pre-indexed byte load:
Calculate the source address by adding together the
value in Rb and the value in Ro. Load the byte value
at the resulting address.
Ro
6
5
Rb
Action
3
2
INSTRUCTION SET
Rd
0
3-77

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