s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 268
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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ETHERNET CONTROLLER
MAC Transmit Control Frame Status
The transmit control frame status register, ETXSTAT, is a RAM-based register which provides the status of a
MAC control packet as it is sent to a remote station. This operation is controlled by the SdPause bit in the
transmit control register, MACTXCON.
It is the responsibility of the DMA engine to read this register, and to generate an interrupt to notify the system
that the transmission of a MAC control packet has been completed.
7-46
ETXSTAT
Bit Number
Registers
[15:0]
Tx_Stat value
0X9040
Offset
Table 7-43. Transmit Control Frame Register Description
Bit Name
Table 7-42. ETXSTAT Register
R/W
R
A 16-bit value indicating the status of a MAC control packet as
it is sent to a remote station. Read by the DMA engine.
Transmit control frame status
Description
Description
Reset Value
0x00000000
S3C4510B
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