s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 246
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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ETHERNET CONTROLLER
7-24
Bit Number
[14]
[15]
BDMA Tx enable (BTxEn)
BDMA Tx reset (BTxRS)
Table 7-4. BDMA Transmit Control Register Description (Continued)
Bit Name
When the Tx enable bit is set to "1", the BDMA Tx block is
enabled. Even if this bit is disabled, buffer data will be moved
to the MAC Tx FIFO until the BDMA Tx buffer underflows (as
long as the FIFO is not empty and the MAC Tx is enabled).
This bit is automatically disabled in the following cases: 1) if
the next frame pointer is null, or 2) if the owner bit is zero, and
the BTxSTSKO bit is set.
NOTE: The frame descriptor start address pointer must be
assigned before the BDMA Tx enable bit is set.
Set this bit to "1" to reset the BDMA Tx block.
Description
S3C4510B
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