s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 151

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
Table 4-3 and Table 4-4
Using big-endian and word access, Program/Data path between register and external memory
WA=Address whose LSB is 0, 4, 8, C
CAS3-0/nWBE3-0=0 means active and 1 means inactive
Table 4-3. Word Access Store Operation with Big-Endian
Ext. Memory Type
Bit Num.
CPU Register Data
CPU Address
Bit Num.
CPU Data Bus
Bit Num.
Internal SD Bus
External Address
CAS3-0/nWBE3-0
Bit Num.
XDATA
Bit Num.
Ext. Memory Data
Timing Sequence
Bit Num.
CPU Register Data
CPU Address
Bit Num.
CPU Data Bus
Bit Num.
Internal SD Bus
External Address
CAS3-0/nWBE3-0
Bit Num.
XDATA
Bit Num.
Ext. Memory Data
Timing Sequence
Ext. Memory Type
Table 4-4 Word Access Load Operation with Big-Endian
STORE (CPU Reg
Word
Word
0000
0000
abcd
abcd
abcd
abcd
abcd
abcd
abcd
abcd
abcd
abcd
31 0
31 0
31 0
31 0
31 0
31 0
31 0
31 0
31 0
31 0
WA
WA
WA
WA
Half Word
1st write
1st read
X=Don't care
XX00
abXX
abXX
XX00
abcd
abcd
31 0
31 0
15 0
15 0
31 0
31 0
15 0
15 0
WA
WA
ab
ab
ab
ab
Half Word
abcd
abcd
31 0
LOAD (CPU Reg
31 0
WA
WA
External Memory)
2nd write
2nd read
WA + 2
WA + 2
XX00
XX00
abcd
abcd
abcd
abcd
31 0
31 0
15 0
15 0
31 0
31 0
15 0
15 0
cd
cd
cd
cd
Byte
1st write
1st read
XXX0
aXXX
aXXX
XXX0
abcd
abcd
31 0
31 0
31 0
31 0
WA
WA
7 0
7 0
7 0
7 0
a
a
a
a
External Memory)
2nd write
2nd read
WA + 1
WA + 1
XXX0
XXX0
abXX
abXX
abcd
abcd
31 0
31 0
31 0
31 0
7 0
7 0
7 0
7 0
b
b
b
b
Byte
abcd
abcd
31 0
31 0
WA
WA
3rd write
3rd read
WA + 2
WA + 2
XXX0
XXX0
abcX
abcX
abcd
abcd
31 0
31 0
31 0
31 0
7 0
7 0
7 0
7 0
SYSTEM MANAGER
c
c
c
c
4th write
4th read
WA + 3
WA + 3
XXX0
XXX0
abcd
abcd
abcd
abcd
31 0
31 0
31 0
31 0
7 0
7 0
7 0
7 0
d
d
d
d
4-9