s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 166
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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SYSTEM MANAGER
SYSTEM CLOCK
The external clock input, XCLK, can be used to the internal system clock by assign V
PLL for the internal system clock, V
is XCLK
For the purpose of power save, Clock Control Register (CLKCON) can be programed at low frequency. When the
internal system clock is divided by CLKCON, it's duty-cycle is changed.
If CLKCON is programed to zero, the internal system clock remains the same as the internal clock, ICLK. In other
cases, the duty cycle of internal system clock is no longer 50%.
Figure 4-9 shows the internal system clock, SCLK(MCLK) waveform according to the clock dividing value.
4-24
CLKSEL
TMOD
XCLK
MF. To get 50MHz of system clock, a 10 MHz external clock must be used.
SCLK(MCLK)
SCLK(MCLK)
SCLK(MCLK)
NOTES:
1.
2.
CLKCON = 0
CLKCON = 1
CLKCON = 2
If CLKSEL is 1, the PLL block became to the state of power down.
MF means Multiplication Factor.
MF
ICLK
(2)
0: MF = 5.0
1: MF = 6.6
PLL
Figure 4-9. Divided System Clocks Timing Diagram
pdown
SS
(1)
has to be assigned to CLKSEL pin. In this case, the internal system clock
Figure 4-8. System Clock Circuit
0
1
MUX
ICLK
Low Power Control
Clock Divider for
(CLKCON)
DD
Internal System
Clock SCLK
(MCLK)
to CLKSEL pin. Using
MCLKO
CLKOEN
S3C4510B
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