s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 392
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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INTERRUPT CONTROLLER
INTERRUPT PENDING BY PRIORITY REGISTER
The interrupt pending by priority register, INTPNDPRI, contains interrupt pending bits, which are re-ordered by
the INTPRIn register settings. INTPNDPRI[20] is mapped to the interrupt source of whichever bit index is written
into the priority 20 field of the INTPRIn registers.
This register is useful for testing. To validate the interrupt pending by priority value, you can obtain the highest
priority pending interrupt from the interrupt offset register, INTOFFSET.
INTERRUPT PENDING TEST REGISTER
The interrupt pending test register, INTPNDTST, is used to set or clear INTPND and INTPNDPRI. If user writes
data to this register, it is written into both the INTPND register and INTPNDPRI register. The interrupt pending
test register, INTPNDTST, is also useful for testing.
For INTPND, the same bit position is updated with the new coming data. For INTPNDPRI, the mapping bit
position by INTPRIn registers is updated with the new coming data to keep with the contents of the INTPND
register.
13-8
INTPNDPRI
INTPNDTST
Register
Register
Offset Address
Address
0x402C
0x4028
Offset
R/W
R/W
Table 13-8. INTPNDTST Register
W
Table 13-7. INTPNDPRI Register
R
Interrupt pending by priority
Interrupt pending test register
Description
Description
Reset Value
Reset Value
0x00000000
0x00000000
S3C4510B
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