s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 234
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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ETHERNET CONTROLLER
FLOW CONTROL BLOCK
The flow control block provides for the following functions:
— Recognition of MAC control frames received by the receive block
— Transmission of MAC control frames, even if transmitter is paused
— Timers and counters for pause operation
— Command and status register (CSR) interface
— Options for passing MAC control frames through to software drivers
The receive logic in the flow control block recognizes a MAC control frame as follows:
— The length/type field must have the special value specified for MAC control frames. The destination address
— If the length/type field does not have the special value specified for MAC control frames, the MAC takes no
You can set control bits in the transmit status register to generate a Full-Duplex pause operation or other MAC
control functions, even if the transmitter itself is paused. Two timers and two corresponding CSR registers are
used during a pause operation. One timer/register pair is used when a received packet causes the transmitter to
pause. The other pair is used to approximate the pause status of the other end of the link, after the transmitter
sends a Pause command.
The command and status register (CSR) interface provides control and status bits within the transmit and receive
control registers and status registers. These lets you initiate the sending of a MAC control frame, enable and
disable MAC control functions, and read the values of the flow control counters.
Control bits are provided for processing MAC control frames entirely within the controller, or for passing MAC
control frames on to the software drivers. This lets you enable flow control by default even on software drivers
which are not otherwise "flow control aware".
7-12
must be recognized by the CAM. The frame length must be 64 bytes, including CRC. The CRC must be
valid, and the frame must contain a valid pause op-code and operation.
action, and the packet is treated as a normal packet. If the CAM does not recognize the destination address,
the MAC rejects the packet. If the packet length is not 64 bytes, including CRC, the MAC does not perform
the operation. The packet is then marked as a MAC control packet, and is passed forward to the software
drivers, if pass-through is enabled.
S3C4510B
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