s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 292

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

HDLC CONTROLLERS
PROTOCOL FEATURES
INVALID FRAME
A valid frame must have at least the A, C, and FCS fields between its opening and closing flags. Even if no-CRC
mode is set, the frame size should not be less than 32 bits. There are three invalid frame conditions:
— Short frame: a frame that contains less than 25 bits between flags. Short frames are ignored.
— Invalid frame: a frame with 25 bits or more, having a CRC compare error or non- byte-aligned. Invalid frames
— Aborted frame: a frame aborted by the reception of an abort sequence is handled as an invalid frame.
ZERO INSERTION AND ZERO DELETION
The zero insertion and zero deletion feature, which allows the content of a frame to be transparent, is handled
automatically by the HDLC module. While the transmitter inserts a binary '0' following any sequence of five 1s
within a frame, the receiver deletes a binary '0' that follows a sequence of five 1s within a frame.
ABORT
The function of early termination of a data link is called an abort The transmitter aborts a frame by sending at
least eight consecutive 1s immediately after the abort transmitter control bit (TxABT in HCON) is set to '1'.
(Setting this control bit automatically clears the HTxFIFO.)
The abort sequence can be extended up to (at least) 16 consecutive 1s by setting the abort extend control bit
(TxABTEXT in HCON) to '1'. This feature is useful for forcing the mark idle state. The receiver interprets the
reception of seven or more consecutive 1s as an abort.
The receiver responds the abort received as follows:
— An abort in an 'out of frame' condition: an abort has no meaning during the idle or the time fill
— An abort 'in frame' after less than 25 bits are received after an opening flag: under this condition, no field of
— An abort 'in frame' after 25 bits or more are received after an opening flag: in this condition, some fields of
IDLE AND TIME FILL
When the transmitter is not transmitting a frame, it is in an idle state. The transmitter signals that it has entered
an idle state in one of the following two ways: 1) by transmitting a continuous series of flag patterns (time fill), or
2) by transmitting a stream of consecutive 1s (mark idle). The flags and mark idle are not transferred to the
HRXFIFO.
The flag or mark idle selection bit (TxFLAG in HCON) controls this function: when TxFLAG is '0', mark idle is
selected; when TxFLAGIDLE is '1', the time fill method is selected.
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are transferred to the HRXFIFO, then the invalid frame error flag (RxCRCE, RxNO in the status register) is
set to indicate that an invalid frame has been received.
the aborted frame is transferred to the HRXFIFO. The HDLC module clears the aborted frame data in the
receiver and flag synchronization. The aborted reception is indicated in the status register.
the aborted frame may be transferred to the HRXFIFO. The abort status is set in the status register and the
data of the aborted frame in the HRXFIFO is cleared. Flag synchronization is also cleared and the DMA
operation for receiving is aborted too.
S3C4510B