s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 161
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s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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S3C4510B
CONTROL REGISTERS
SYSTEM CONFIGURATION REGISTER (SYSCFG)
The System Manager has one system configuration register, SYSCFG. The SYSCFG register determines the
start address of the System Manager's special registers and the start address of internal SRAM. (The total special
register space in the system memory map is fixed at 64 K bytes.)
You also use SYSCFG settings to control write buffer enable, cache enable, and stall enable operations.
All DRAM banks can be configured to SDRAM banks by set the Synchronous DRAM mode (SYSCFG[31]).
SYSCFG
If you write a "10" into the cache mode field, SYSCFG[5:4], the cache enable bit is cleared automatically
(see Figure 4-6).
Registers
Offset Address
0x0000
Table 4-16. SYSCFG Register
R/W
R/W
System configuration register
NOTE
Description
SYSTEM MANAGER
Reset Value
0x37FFFF91
4-19
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