s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 388

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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INTERRUPT CONTROLLER
INTERRUPT PENDING REGISTER
The interrupt pending register, INTPND, contains interrupt pending bits for each interrupt source. This register
has to be cleared at the top of an interrupt service routine.
13-4
INTPND
Register
INTPND
31
Offset Address
0x4004
[20:0] Interrupt pending bits
NOTE:
[20] I2C interrupt
[19] Ethernet controller MAC Rx interrupt
[18] Ethernet controller MAC Tx interrupt
[17] Ethernet controller BDMA Rx interrupt
[16] Ethernet controller BDMA Tx interrupt
[15] HDLC channel B Rx interrupt
[14] HDLC channel B Tx interrupt
[13] HDLC channel A Rx interrupt
[12] HDLC channel A Tx interrupt
[11] Timer 1 interrupt
[10] Timer 0 interrupt
[9] GDMA channel 1 interrupt
[8] GDMA channel 0 interrupt
[7] UART1 receive and error interrupt
[6] UART1 transmit interrupt
[5] UART0 receive and error interrupt
[4] UART0 transmit interrupt
[3] External interrupt 3
[2] External interrupt 2
[1] External interrupt 1
[0] External interrupt 0
Figure 13-2. Interrupt Pending Register (INTPND)
Each of the 21 bits in the interrupt mode pending register, INTPND,
corresponds to an interrupt source. When an interrupt request is
generated, its pending bit is set to 1. The service routine must then
clear the pending condition by writing a 1 to the apropriate pending
bit at start. The 21 interrupt sources are mapped as follows:
R/W
R/W
Table 13-3. INTPND Register
21 20
Interrupt pending register
x
19
x
18 17
x
x
16
x
15
x
Description
14
x
13
x
12
x
11
x
10
x
9
x
8
x
7
x
6
x
5
x
4
x
Reset Value
0x00000000
3
x
2
x
S3C4510B
1
x
0
x

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