h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 156

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 5 Interrupt Controller
5.4.2
Internal interrupts issued from the on-chip peripheral modules have the following features:
1. For each on-chip peripheral module there are flags that indicate the interrupt request status,
2. The control level for each interrupt can be set by ICR.
3. The DTC can be activated by an interrupt request from an on-chip peripheral module.
4. An interrupt request that activates the DTC is not affected by the interrupt control mode or the
5.5
Table 5.3 lists interrupt exception handling sources, vector addresses, and interrupt priorities. For
default priorities, the lower the vector number, the higher the priority. Modules set at the same
priority will conform to their default priorities. Priorities within a module are fixed.
An interrupt control level can be specified for a module to which an ICR bit is assigned. Interrupt
requests from modules that are set to control level 1 (priority) by the ICR bit setting and the I and
UI bits in CCR are given priority and processed before interrupt requests from modules that are set
to control level 0 (no priority).
Rev. 3.00 Mar 21, 2006 page 102 of 788
REJ09B0300-0300
and enable bits that individually select enabling or disabling of these interrupts. When the
enable bit for a particular interrupt source is set to 1, an interrupt request is sent to the interrupt
controller.
status of the CPU interrupt mask bits.
Internal Interrupts
Interrupt Exception Handling Vector Table

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