h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 390

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 13 Timer Connection
13.4.5
IVI Signal Fall Modification and IHI Synchronization
By using the timer connection facility and TMR_1, the fall of the IVI signal can be shifted
backward by the specified number of IHI signal waveforms. Also, the fall of the IVI signal can be
synchronized with the rise of the IHI signal.
To perform 8-bit timer divided waveform period measurement, TCNT in TMR_1 is set to count
external clock (IHI signal) pulses, and to be cleared on the rising edge of the external reset signal
(inverse of the IVI signal). The number of IHI signal pulses until the fall of the IVI signal is
written in TCORB.
Since the IVI signal supplied to the IVO signal selection circuit is normally set on the rise of the
IVI signal and reset on the fall, its waveform is the same as that of the original IVI signal. When
fall modification is selected, a reset is performed on a TMR_1 TCORB compare-match in
TMR_1.
The fall of the waveform generated in this way can be synchronized with the rise of the IHI signal,
regardless of whether or not fall modification is selected.
Examples of TCR, TCSR, and TCORB settings in TMR_1 are shown in table 13.8, and the fall
modification/IHI synchronization timing chart is shown in figure 13.7.
Rev. 3.00 Mar 21, 2006 page 336 of 788
REJ09B0300-0300

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