h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 486

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
Bit Bit Name
5
4
Rev. 3.00 Mar 21, 2006 page 432 of 788
REJ09B0300-0300
IRTR
AASX
2
C Bus Interface (IIC) (Optional)
Initial Value R/W
0
0
R/(W) * I
R/(W) * Second Slave Address Recognition Flag
Description
Flag
Indicates that the I
request to the CPU, and the source is completion of
reception/transmission of one frame in continuous
transmission/reception for which DTC activation is possible.
When the IRTR flag is set to 1, the IRIC flag is also set to 1
at the same time.
[Setting conditions]
I
Master mode or clocked synchronous serial format mode
with I
[Clearing conditions]
In I
the first frame following a start condition matches bits
SVAX6 to SVAX0 in SARX.
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0 in SARX
[Clearing conditions]
2
2
C Bus Interface Continuous Transfer Interrupt Request
C bus format slave mode:
2
When the ICDRE or ICDRF flag in ICDR is set to 1
when AASX = 1
When the ICDRE or ICDRF flag is set to 1
When 0 is written after reading IRTR = 1
When the IRIC flag is cleared to 0 while ICE is 1
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
C bus format slave receive mode, this flag is set to 1 if
2
C bus format, or formatless mode:
2
C bus interface has issued an interrupt