h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 330
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
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Section 11 16-Bit Free-Running Timer (FRT)
11.5.6
The input capture flag, ICFA, ICFB, ICFC, or ICFD, is set to 1 by the input capture signal. The
FRC value is simultaneously transferred to the corresponding input capture register (ICRA, ICRB,
ICRC, or ICRD). Figure 11.11 shows the timing of setting the ICFA to ICFD flag.
11.5.7
The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when
the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the
last state in which the two values match, just before FRC increments to a new value. When the
FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next
cycle of the clock source. Figure 11.12 shows the timing of setting the OCFA or OCFB flag.
Rev. 3.00 Mar 21, 2006 page 276 of 788
REJ09B0300-0300
Figure 11.11 Timing of Input Capture Flag (ICFA, ICFB, ICFC, or ICFD) Setting
Input capture
signal
ICFA to ICFD
FRC
ICRA to ICRD
Timing of Input Capture Flag (ICF) Setting
Timing of Output Compare Flag (OCF) setting
N
N
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