h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 594

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 Host Interface LPC Interface (LPC)
Bit
1
0
19.3.2
Bits 6 to 0 in HICR2 control interrupts from the host interface (LPC) module to the slave
processor (this LSI). Bit 7 in HICR2 and HICR3 monitor host interface pin states.
The pin states can be monitored regardless of the host interface operating state or the operating
state of the functions that use pin multiplexing.
Bit
7
6
Rev. 3.00 Mar 21, 2006 page 540 of 788
REJ09B0300-0300
HICR2
Bit Name Initial Value Slave Host Description
LSMIB
LSCIB
Bit Name Initial Value Slave Host Description
GA20
LRST
Host Interface Control Registers 2 and 3 (HICR2, HICR3)
0
0
Undefined
0
R/W
R/W
R
R/(W) * —
R/W
R/W
—
—
—
LSMI Output Bit
Controls LSMI output in combination with the LSMIE
bit. For details, refer to description on the LSMIE bit
in HICR0.
LSCI output Bit
Controls LSCI output in combination with the LSCIE
bit. For details, refer to description on the LSCIE bit
in HICR0.
GA20 Pin Monitor
LPC Reset Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware reset occurs.
0: [Clearing condition]
Writing 0 after reading LRST = 1
1: [Setting condition]
LRESET pin falling edge detection