h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 605

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Note:
Bit
0
Bit
7
6
5
4
3
2
STR3 (TWRE = 0 and SELSTR3 = 1)
Bit Name Initial Value Slave Host Description
OBF3A
Bit Name Initial Value Slave Host Description
DBU37
DBU36
DBU35
DBU34
C/D3
DBU32
* Only 0 can be written to clear the flag.
0
0
0
0
0
0
0
R/(W) * R
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R
R
R
R
R
Output Buffer Full
Set to 1 when the slave processor (this LSI) writes to
ODR. OBF3A is cleared to 0 when the host
processor reads ODR.
0: [Clearing condition]
When the host processor reads ODR using I/O read
cycle, or the slave processor writes 0 to the OBF bit
1: [Setting condition]
When the slave processor writes to ODR
Defined by User
The user can use these bits as necessary.
Command/Data
When the host processor writes to an IDR register,
bit 2 of the I/O address is written into this bit to
indicate whether IDR contains data or a command.
0: Contents of data register (IDR) are data
1: Contents of data register (IDR) are a command
Defined by User
The user can use this bit as necessary.
Section 19 Host Interface LPC Interface (LPC)
Rev. 3.00 Mar 21, 2006 page 551 of 788
REJ09B0300-0300