h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 381

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

13.3.4
SEDGR detects a rising edge on the timer connection input pins and the occurrence of 2fH
modification, and determines the phase of the IVI and IHI signals.
Bit
7
6
5
4
Bit Name
VEDG
HEDG
CEDG
HFEDG
Edge Sense Register (SEDGR)
Initial Value
0
0
0
0
R/W
R/(W) *
R/(W) *
R/(W) *
R/(W) *
1
1
1
1
Description
VSYNCI Edge
Detects a rising edge on the VSYNCI pin.
[Clearing condition]
When 0 is written in VEDG after reading VEDG = 1
[Setting condition]
When a rising edge is detected on the VSYNCI pin
HSYNCI Edge
Detects a rising edge on the HSYNCI pin.
[Clearing condition]
When 0 is written in HEDG after reading HEDG = 1
[Setting condition]
When a rising edge is detected on the HSYNCI pin
CSYNCI Edge
Detects a rising edge on the CSYNCI pin.
[Clearing condition]
When 0 is written in CEDG after reading CEDG = 1
[Setting condition]
When a rising edge is detected on the CSYNCI pin
HFBACKI Edge
Detects a rising edge on the HFBACKI pin.
[Clearing condition]
When 0 is written in HFEDG after reading HFEDG = 1
[Setting condition]
When a rising edge is detected on the HFBACKI pin
Rev. 3.00 Mar 21, 2006 page 327 of 788
Section 13 Timer Connection
REJ09B0300-0300