h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 642

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 21 A/D Converter
21.3
The A/D converter has the following registers.
21.3.1
There are four 16-bit read-only ADDR registers, ADDRA to ADDRD, used to store the results of
A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown
in table 21.2.
The converted 10-bit data is stored to bits 15 to 6. The lower 6-bit data is always read as 0.
The data bus between the CPU and the A/D converter is 8-bit width. The upper byte can be read
directly from the CPU, but the lower byte should be read via a temporary register. The temporary
register contents are transferred from the ADDR when the upper byte data is read. When reading
the ADDR, read the upper byte before lower byte or in word units.
Table 21.2 Analog Input Channels and Corresponding ADDR Registers
Rev. 3.00 Mar 21, 2006 page 588 of 788
REJ09B0300-0300
Group 0
AN0
An1
AN2
AN3
A/D data register A (ADDRA)
A/D data register B (ADDRB)
A/D data register C (ADDRC)
A/D data register D (ADDRD)
A/D control/status register (ADCSR)
A/D control register (ADCR)
Keyboard comparator control register (KBCOMP)
Register Descriptions
A/D Data Registers A to D (ADDRA to ADDRD)
Analog Input Channel
Group 1
AN4
AN5
AN6, or CIN0 to CIN7
AN7, or CIN8 to CIN15
A/D Data Register to Store A/D
Conversion Results
ADDRA
ADDRB
ADDRC
ADDRD

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