h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 404

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 14 Watchdog Timer (WDT)
Bit
7
6
5
4
3
Rev. 3.00 Mar 21, 2006 page 350 of 788
REJ09B0300-0300
TCSR_1
Bit Name Initial Value R/W
OVF
WT/IT
TME
PSS
RST/NMI 0
0
0
0
0
R/(W) *
R/W
R/W
R/W
R/W
1
Description
Overflow Flag
Indicates that TCNT has overflowed (changes from H'FF
to H'00).
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
However, when internal reset request generation is
selected in watchdog timer mode, OVF is cleared
automatically by the internal reset.
[Clearing conditions]
Timer Mode Select
Selects whether the WDT is used as a watchdog timer or
interval timer.
0: Interval timer mode
1: Watchdog timer mode
Timer Enable
When this bit is set to 1, TCNT starts counting.
When this bit is cleared, TCNT stops counting and is
initialized to H'00.
Prescaler Select
Selects the clock source to be input to TCNT.
0: Counts the divided cycle of –based prescaler (PSM)
1: Counts the divided cycle of SUB–based prescaler
Reset or NMI
Selects to request an internal reset or an NMI interrupt
when TCNT has overflowed.
0: An NMI interrupt is requested
1: An internal reset is requested
(PSS)
When TCSR is read when OVF = 1 *
written to OVF
When 0 is written to TME
2
, then 0 is