h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 588

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 Host Interface LPC Interface (LPC)
Bit
4
3
Rev. 3.00 Mar 21, 2006 page 534 of 788
REJ09B0300-0300
Bit Name Initial Value Slave Host Description
FGA20E
SDWNE
0
0
R/W
R/W
R/W
—
—
Fast A20 Gate Function Enable
Enables or disables the fast A20 gate function. When
the fast A20 gate is disabled, the normal A20 gate
can be implemented by firmware operation of the
P81 output.
When the fast A20 gate function is enabled, the DDR
bit for P81 must not be set to 1.
0: Fast A20 gate function disabled
1: Fast A20 gate function enabled
LPC Software Shutdown Enable
Controls host interface shutdown. For details of the
LPC shutdown function, and the scope of initialization
by an LPC reset and an LPC shutdown, see section
19.4.4, Host Interface Shutdown Function (LPCPD).
0: Normal state, LPC software shutdown setting
[Clearing conditions]
1: LPC hardware shutdown state setting enabled
[Setting condition]
enabled
Other function of pin P81 is enabled
GA20 output internal state is initialized to 1
GA20 pin output is open-drain (external VCC pull-
up resistor required)
Writing 0
LPC hardware reset or LPC software reset
LPC hardware shutdown release (rising edge of
LPCPD signal)
Hardware shutdown state when LPCPD signal is
low
Writing 1 after reading SDWNE = 0