h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 29

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

12.7 Input Capture Operation.................................................................................................... 306
12.8 Interrupt Sources............................................................................................................... 309
12.9 Usage Notes ...................................................................................................................... 310
Section 13 Timer Connection
13.1 Features ............................................................................................................................. 317
13.2 Input/Output Pins .............................................................................................................. 319
13.3 Register Descriptions ........................................................................................................ 319
13.4 Operation .......................................................................................................................... 329
13.5 Usage Note........................................................................................................................ 344
Section 14 Watchdog Timer (WDT)
14.1 Features ............................................................................................................................. 345
14.2 Input/Output Pins .............................................................................................................. 347
14.3 Register Descriptions ........................................................................................................ 347
12.6.1 16-Bit Count Mode .............................................................................................. 305
12.6.2 Compare-Match Count Mode .............................................................................. 306
12.9.1 Conflict between TCNT Write and Clear ............................................................ 310
12.9.2 Conflict between TCNT Write and Increment..................................................... 311
12.9.3 Conflict between TCOR Write and Compare-Match........................................... 312
12.9.4 Conflict between Compare-Matches A and B...................................................... 313
12.9.5 Switching of Internal Clocks and TCNT Operation............................................. 313
12.9.6 Mode Setting with Cascaded Connection ............................................................ 315
12.9.7 Module Stop Mode Setting .................................................................................. 315
13.3.1 Timer Connection Register I (TCONRI) ............................................................. 320
13.3.2 Timer Connection Register O (TCONRO) .......................................................... 323
13.3.3 Timer Connection Register S (TCONRS)............................................................ 325
13.3.4 Edge Sense Register (SEDGR) ............................................................................ 327
13.4.1 PWM Decoding (PDC Signal Generation) .......................................................... 329
13.4.2 Clamp Waveform Generation (CL1/CL2/CL3 Signal Generation) ..................... 330
13.4.3 Measurement of 8-Bit Timer Divided Waveform Period .................................... 332
13.4.4 2fH Modification of IHI Signal ........................................................................... 334
13.4.5 IVI Signal Fall Modification and IHI Synchronization ....................................... 336
13.4.6 Internal Synchronization Signal Generation (IHG/IVG/CL4 Signal
13.4.7 HSYNCO Output ................................................................................................. 341
13.4.8 VSYNCO Output ................................................................................................. 342
13.4.9 CBLANK Output ................................................................................................. 343
13.5.1 Module Stop Mode Setting .................................................................................. 344
14.3.1 Timer Counter (TCNT)........................................................................................ 347
14.3.2 Timer Control/Status Register (TCSR) ................................................................ 348
Generation) .......................................................................................................... 338
........................................................................................... 317
.............................................................................. 345
Rev. 3.00 Mar 21, 2006 page xxix of liv