h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 421

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Note:
Bit
4
3
2
1
0
Bit Name
FER
PER
TEND
MPB
MPBT
* Only 0 can be written, to clear the flag.
Initial Value
0
0
1
0
0
R/W
R/(W) *
R/(W) *
R
R
R/W
Section 15 Serial Communication Interface (SCI and IrDA)
Description
Framing Error
[Setting condition]
When the stop bit is 0
[Clearing condition]
When 0 is written to FER after reading FER = 1
In 2-stop-bit mode, only the first stop bit is checked.
Parity Error
[Setting condition]
When a parity error is detected during reception
[Clearing condition]
When 0 is written to PER after reading PER = 1
Transmit End
[Setting conditions]
[Clearing conditions]
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive
frame. When the RE bit in SCR is cleared to 0 its
previous state is retained.
Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to
the transmit frame.
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit of
a 1-byte serial transmit character
When 0 is written to TDRE after reading
TDRE = 1
When a TXI interrupt request is issued allowing
the DTC to write data to TDR
Rev. 3.00 Mar 21, 2006 page 367 of 788
REJ09B0300-0300