h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 519
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
- Current page: 519 of 845
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16.4.6
If the slave address matches to the address in the first frame (address reception frame) following
the start condition detection when the 8th bit data (R/W) is 1 (read), the TRS bit in ICCR is
automatically set to 1 and the mode changes to slave transmit mode.
Figure 16.24 shows the sample flowchart for the operations in slave transmit mode.
No
Slave Transmit Operation
Write transmit data in ICDR
No
No
Clear ACKE to 0 in ICCR
Set TRS = 0 in ICCR
Read ACKB in ICSR
Slave transmit mode
Clear IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
(ACKB=0 clear)
of transmission
(ACKB = 1)?
Read ICDR
IRIC = 1?
IRIC = 1?
Figure 16.24 Sample Flowchart for Slave Transmit Mode
End
End
Yes
Yes
Yes
[3], [4] Wait for 1 byte to be transmitted.
[6] Read IRIC in ICCR
[1], [2] If the slave address matches to the address in the first frame
[7] Clear acknowledge bit data
[8] Set slave receive mode.
[9] Dummy read (to release the SCL line).
[10] Wait for stop condition
[3], [5] Set transmit data for the second and subsequent bytes.
[4] Determine end of transfer.
following the start condition detection and the R/W bit is 1
in slave recieve mode, the mode changes to slave transmit mode.
Section 16 I
Rev. 3.00 Mar 21, 2006 page 465 of 788
2
C Bus Interface (IIC) (Optional)
REJ09B0300-0300
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