h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 483
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
- Current page: 483 of 845
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transfer using the DTC. The ICDRE or ICDRF flag is cleared, however, since the specified
number of ICDR reads or writes have been completed.
Tables 16.4 and 16.5 show the relationship between the flags and the transfer states.
Table 16.4 Flags and Transfer States (Master Mode)
Legend:
0:
1:
—: Previous state retained
0 : Cleared to 0
1 : Set to 1
MST
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0-state retained
1-state retained
TRS
1
1
—
1
1
1
1
1
1
0
0
0
0
0
0
—
BBSY
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
ESTP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
STOP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IRTR
0
1
—
—
1
—
—
—
1
1
—
—
—
1
—
—
AASX
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
AAS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ADZ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 16 I
Rev. 3.00 Mar 21, 2006 page 429 of 788
ACKB
0
0
—
1
0
0
0
0
0
—
—
—
—
—
—
—
ICDRF
—
—
—
—
—
—
—
—
—
1
0
1
0
1
—
—
2
C Bus Interface (IIC) (Optional)
ICDRE
0
1
—
—
1
0
1
0
1
—
—
—
—
—
—
0
State
Idle state (flag clearing
required)
Start condition detected
Wait state
Transmission end
(ACKE=1 and ACKB=1)
Transmission end with
ICDRE=0
ICDR write with the above
state
Transmission end with
ICDRE=1
ICDR write with the above
state or after start
condition detected
Automatic data transfer
from ICDRT to ICDRS with
the above state
Reception end with
ICDRF=0
ICDR read with the above
state
Reception end with
ICDRF=1
ICDR read with the above
state
Automatic data transfer
from ICDRS to ICDRR
with the above state
Arbitration lost
Stop condition detected
REJ09B0300-0300
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