h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 814

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 27 Electrical Characteristics
Notes: 1. Set the times according to the program/erase algorithms.
27.2.7
1. Internal step-down products
Rev. 3.00 Mar 21, 2006 page 760 of 788
REJ09B0300-0300
The H8S/2148 B-masked product (HD64F2148B) includes an internal step-down circuit to
step down the microprocessor internal power supply voltage to the appropriate level.
One or two (in parallel) internal voltage regulating capacitors (0.47 µF) should be inserted
between the internal step-down pin (VCL pin) and VSS pin. The method of connecting the
external capacitor(s) is shown in figure 27.5.
For the 5-V and 4-V version products whose power supply (VCC) voltage exceeds 3.6 V, do
not connect the VCC power supply to the VCL pin of the internal step-down product. (Connect
the VCC power supply to the VCC1 pin, as usual.)
For the 3-V version product whose power supply (VCC) voltage is 3.6 V or less, connect the
system power supply to the VCL pin together with the VCC1 pins.
When switching from the F-ZTAT version product without the internal step-down function to
the F-ZTAT B-masked product with the internal step-down function, note that the VCL pin is
allocated to the same location as the VCC2 pin of the product without the internal step-down
function. Therefore, the difference in the circuits between before and after the switchover
should be considered when designing the PC board patterns.
2. Programming time per 128 bytes (Shows the total period for which the P-bit in FLMCR1
3. Block erase time (Shows the total period for which the E-bit in FLMCR1 is set. It does
4. Maximum programming time (t
5. The maximun number of writes (N) should be set according to the actual set value of
6. Maximum erase time (t
7. The maximum number of erases (N) should be set according to the actual set value of z
Usage Notes
t
The wait time after P-bit setting (z1, z2, and z3) should be alternated according to the
t
is set. It does not include the programming verification time.)
not include the erase verification time.)
z1, z2 and z3 to allow programming within the maximum programming time (t
number of writes (n) as follows:
1
7
to allow erasing within the maximum erase time (t
P
E
(max) = (wait time after P-bit setting (z1) + (z3))
(max) = Wait time after E-bit setting (z)
n
n
6
1000
+ wait time after P-bit setting (z2)
z1 = 30 µs, z3 = 10 µs
z2 = 200 µs
E
(max))
P
(max))
maximum erase count (N)
((N) – 6)
E
(max)).
6
P
(max)).