h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 505

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Receive Operation Using the Wait Function:
Figures 16.14 and 16.15 show the sample flowcharts for the operations in master receive mode
(WAIT = 1).
User processing
(master output)
(master output)
(slave output)
ICDRR
ICDRF
SCL
SDA
User processing
SDA
IRTR
IRIC
(master output)
(master output)
(slave output)
Master transmit mode
ICDRF
ICDRR
SCL
SDA
SDA
IRTR
IRIC
Figure 16.12 Example of Operation Timing in Master Receive Mode
Figure 16.13 Example of Stop Condition Issuance Operation Timing
Bit 1
Data 1
Data 2
7
[4] IRIC clear
[1] TRS = 0 clear
Bit 0
in Master Receive Mode (MLS = WAIT = 0, HNDS = 1)
8
A
9
[6] Set ACKB = 1
A
[3]
9
SCL is fixed low until ICDR is read
[1] IRIC clear
SCL is fixed low until ICDR is read
Master receive mode
Bit 7
[7] ICDR read
1
(MLS = WAIT = 0, HNDS = 1)
(Data 2)
Bit 7
[2] ICDR read
1
Bit 6
2
(Dummy read)
Bit 6
2
Bit 5
3
Data 1
Bit 5
3
Undefined value
Data 2
Data 3
Bit 4
4
Bit 4
4
Bit 3
5
Bit 3
5
Section 16 I
Bit 2
6
Bit 2
Rev. 3.00 Mar 21, 2006 page 451 of 788
6
Bit 1
7
Bit 1
[4] IRIC clear
SCL is fixed low until
stop condition is issued
7
[9] IRIC clear
Bit 0
8
Bit 0
2
8
C Bus Interface (IIC) (Optional)
[3]
A
9
SCL is fixed low until ICDR is read
[11] Set BBSY = 0 and
A
[8]
9
SCP = 0
(Stop condition instruction issuance)
[5] ICDR read
(Data 1)
Data 1
Stop condition generation
REJ09B0300-0300
[10] ICDR read
Bit 7
1
(Data 3)
Data 2
Data 3
Bit 6
2