h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 376

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 13 Timer Connection
Bit
3
2
1
0
Legend:
X:
Table 13.2 Synchronization Signal Connection Enable
Bit 5
SCONE
0
1
Rev. 3.00 Mar 21, 2006 page 322 of 788
REJ09B0300-0300
Don’t care
Bit Name
HFINV
VFINV
HIINV
VIINV
Normal connection (Initial value)
Synchronization signal
connection mode
Mode
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
FTIA
input
IVI
signal
FTIA
Description
Input Synchronization Signal Inversion
These bits select inversion of the input phase of the
spare horizontal synchronization signal (HFBACKI),
the spare vertical synchronization signal (VFBACKI),
the horizontal synchronization signal (HSYNCI),
composite synchronization signal (CSYNCI), and the
vertical synchronization signal (VSYNCI).
0: The HFBACKI pin state is used directly as the
1: The HFBACKI pin state is inverted before use as
0: The VFBACKI pin state is used directly as the
1: The VFBACKI pin state is inverted before use as
0: The HSYNCI and CSYNCI pin states are used
1: The HSYNCI and CSYNCI pin states are inverted
0: The VSYNCI pin state is used directly as the
1: The VSYNCI pin state is inverted before use as the
HFBACKI input
the HFBACKI input
VFBACKI input
the VFBACKI input
directly as the HSYNCI and CSYNCI inputs
before use as the HSYNCI and CSYNCI inputs
VSYNCI input
VSYNCI input
HFINV
VFINV
HIINV
VIINV
Description
FTIB
FTIB
input
TMO1
signal
FTIC
FTIC
input
VFBACKI
input
FTID
FTID
input
IHI
signal
TMCI1
TMCI1
input
IHI
signal
TMRI1
TMRI1
input
IVI inverse
signal

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