h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 209
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
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7.5
The DTC stores register information in on-chip RAM. When activated, the DTC reads register
information in on-chip RAM and transfers data. After the data transfer, the DTC writes updated
register information back to on-chip RAM. The pre-storage of register information in memory
makes it possible to transfer data over any required number of channels. The transfer mode can be
specified as normal, repeat, or block transfer mode. Setting the CHNE bit in MRB to 1 makes it
possible to perform a number of transfers with a single activation source (chain transfer).
The 24-bit SAR designates the DTC transfer source address, and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed depending on its register information.
Operation
Read register information
Write register information
Clear an activation flag
Transfer counter = 0
Figure 7.4 DTC Operation Flowchart
Read DTC vector
Data transfer
or DISEL = 1
CHNE = 1
No
No
Start
End
Yes
Yes
Next transfer
Interrupt exception
Section 7 Data Transfer Controller (DTC)
Rev. 3.00 Mar 21, 2006 page 155 of 788
Clear DTCER
handling
REJ09B0300-0300
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